Fuente: Wipo "digitalization" 807,882. Digital electric calculating-apparatus. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 17, 1955 [Nov. 22, 1954], No. 32939/55. Class 106 (1). Electronic multiplying and dividing apparatus comprises first and second shifting register storage means, a product generator adapted to receive an input representing a first number and to manifest a series of outputs each representing a different multiple of said first number, a plurality of selecting devices each operable on receipt of an input representing a second number of select that output of the product generator representing the multiple of said first number by said second number, and switching means for performing multiplication and division and for entering the result of such calculation in the storage means. The main embodiment, Figs. 20A-20N, arranged as shown in Fig. 20P, can multiply or divide two thirteendigit decimal numbers registered in two shifting registers, Figs. 20M and 20N, each decimal-digit being registered on the binary scale and being transferred serially over four parallel leads (this being indicated in the drawing by a bracketed four adjacent to the data paths), and comprises basically a multiplier unit to which switching means have been added to enable division to be performed. The result of a division or multiplication operation is entered into one or both, respectively, of the two registers. Multiplication.-Three decimal denominations of the multiplier unit forming the basis of the main embodiment are shown in Figs. 16A and 16B, arranged as in Fig. 16C, and an example of its operation multiplying 523 by 154 is shown in Figs. 16D, and 15A-15E. The unit comprises a product generator which receives serially on four parallel leads the binary coded decimal digits of the multiplicand (523)-lowest denomination first-and which after a four-digit delay provides simultaneously on nine sets of four leads serial signals representing the nine multiples of the multiplicand with the digits 1-9, three binary-to-decimal converters 597, one per denomination, which receive the staticized binary coded multiplier digits (154) and which as a result energizes one or none of nine output leads causing an associated selector switch 591 to select the corresponding multiple of the multiplicand and to pass it to its output terminals 195, and three serial adders 594-596, one per denomination (excepting the highest denomination where the adder is replaced by a one-digit delay), which have an internal delay of one digit. In operation the staticized multiplier digits are applied to the binary-to-decimal converters, the multiplicand is entered serially into the product generator, and after a delay of five-digit periods the product digits-lowest denomination first-emerge from the adder in the units denomination. This is shown in Fig. 16D, where time intervals 6-10 correspond respectively to Figs. 15A-15E. In the main embodiment, Figs. 20A-20N, which is controlled for multiplication by signals (Fig. 10E not shown) produced by a control unit (Figs. 10A-10C, not shown) stimulated by a single multiply signal, the multiplier, staticized in register 1, is applied to the binary-to-decimal converters 830-842, and the multiplicand, staticized in register 2, is shifted " rightwards " out of register 2 and entered into the product generator. Shift of the multiplicand from register 2 to the product generator continues and after 8 digit-periods the digits of the product begin to emerge from adder 801M and are passed via switch 799, Fig. 20N, to the thirteenth position of register 2 where, as the multiplicand digits are shifted out, they are shifted in. This continues until the first twelve lowest order digits of the product have been shifted into register 2, which occurs 20 digit-periods after the start of multiplication, whereupon subsequent product digits are switched to digit position 13 of register 1 and shifted in concurrently with the outward shift of the multiplier formerly staticize